In the wired communications field, a data transmission rate is increasingly high. A conventional transmission method based on serializer/deserializer (SerDes) and non-return-to-zero (NRZ) code modulation is increasingly restricted by physical bandwidth of a package, a device, or the like. A solution based on digital high order modulation, an analog to digital converter (also referred to as ADC), and a digital to analog converter (also referred to as DAC) is becoming a hot alternative solution with a breakthrough in a transmission speed in current high-speed wired communications.
Existing signal distribution circuits (inputdemux) are mainly classified into two types technically a current-type inputdemux and a voltage-type inputdemux. An existing voltage-type signal distribution circuit is shown in FIG. 1. A high-speed voltage signal directly passes through a two-stage N-channel metal oxide semiconductor (NMOS) switch 101, and is sampled on a second-stage capacitor. At a hold phase, a voltage buffer, namely, a P-channel metal oxide semiconductor (PMOS) source follower, is used to further distribute a voltage signal obtained by sampling to a sampling capacitor of a third-stage sub analog to digital converter (sub ADC) 102. Sampling is performed twice during an entire signal distribution period.
In the existing voltage-type signal distribution circuit solution, there are disadvantages of relatively low signal bandwidth and poor signal linearity.